Technical Field
Embodiments described herein are related to reliability management for an electronic device.
Description of the Related Art
Electronic devices are typically designed to a target service lifetime, during which the device is expected to operate correctly. Beyond this service lifetime, the device may fail to operate correctly due to wear or other common aging effects. While a given instance of a device may have a defect that causes the device to fail before the lifetime, generally the failure rate prior to the end of the lifetime is expected to be on the order of one in several million instances and often the device, absent a defect, will often last long beyond the service lifetime.
Reliability analysis generally has to do with determining the worst case conditions that can cause the device to fail, and ensuring that the components of the device will not fail more often than the desired failure rate over the desired lifetime under those worst case conditions and to promote a long lifetime for the device. Such determinations are intentionally conservative, and thus numerous devices that do not frequently experience worst-case conditions may have lifetimes that far exceed the design lifetime. While the additional lifetime can be welcome, it can also indicate at the device is over-engineered and possibly more expensive than necessary.
One aspect of wear that occurs in semiconductors is threshold voltage shift (VT shift). The threshold voltage is the voltage (e.g. gate to source voltage for complementary metal-oxide-semiconductor (CMOS) transistors) that causes non-leakage current flow through the transistor (e.g. the transistor is “on”). With VT shift, the threshold voltage increases in magnitude, which has the effect of slowing down the operation of digital circuitry formed from the transistors. When the VT shift is large enough, the increased delays may cause incorrect operation (failure) to occur in the digital circuitry.
Typically, the VT shift failure problem is addressed by estimating the amount of VT shift that would occur over worst-case use conditions for the lifetime of the device, and determining an additional amount of supply voltage magnitude which would cause the digital circuitry to still operate correctly in the presence of the estimated VT shift. That is, increased supply voltage can overcome the increased delay. The semiconductor integrated circuit (IC) is tested at a given supply voltage magnitude (and corresponding operating frequency) and then the additional amount of supply voltage magnitude is added as a “guardband.” There can be other supply voltage guardbands for other reasons, and other aging-related issues that cause increased delays for digital circuits can be addressed by guardbanding. The guardbanded supply voltage magnitude is specified as the supply voltage magnitude for operation at the corresponding operating frequency. This mechanism penalizes the ICs early in their lifetimes, as the supply voltage magnitude is higher than required to support correct operation. Either more power is consumed than necessary, or the performance is lower than it could otherwise be because the digital circuitry can be operated at a higher clock frequency and the specified supply voltage.